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The Potential of Dynamic Binary Modification and CPU-FPGA SoCs for Simulation.

, , , , , and . FCCM, page 144-151. IEEE Computer Society, (2017)

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Meaningful Type Names as a Basis for Object Lifetime Prediction, , and . Proceedings of the 2008 ACM SIGPLAN International Conference on Object Oriented Programming Systems Languages & Applications, page ???. (April 2008)Lee-TM: A Non-trivial Benchmark Suite for Transactional Memory, , , , , and . Algorithms and Architectures for Parallel Processing, page 196--207. Springer, (2008)SpiNNaker: impact of traffic locality, causality and burstiness on the performance of the interconnection network., , , , and . Conf. Computing Frontiers, page 11-20. ACM, (2010)CHO: towards a benchmark suite for OpenCL FPGA accelerators., , and . IWOCL, page 10:1-10:10. ACM, (2015)Analysis of the Usage Models of System Memory Management Unit in Accelerator-attached Translation Units., , , and . MEMSYS, page 86-96. ACM, (2020)EnnCore: End-to-End Conceptual Guarding of Neural Architectures., , , , , , , , , and 1 other author(s). SafeAI@AAAI, volume 3087 of CEUR Workshop Proceedings, CEUR-WS.org, (2022)Evaluating the Impact of Optimizations for Dynamic Binary Modification on 64-bit RISC-V., , , and . ISPASS, page 81-91. IEEE, (2023)Empirical Evaluation of Fixed-Point Arithmetic for Deep Belief Networks., , , and . ARC, volume 7806 of Lecture Notes in Computer Science, page 225. Springer, (2013)Speculative Parallelization - Eliminating the Overhead of Failure., , , and . HPCC, volume 4782 of Lecture Notes in Computer Science, page 460-471. Springer, (2007)Can the Optimizer Cost be Used to Predict Query Execution Times?, , and . CoRR, (2019)