Author of the publication

Power-efficiency analysis of accelerated BWA-MEM implementations on heterogeneous computing platforms.

, , , , and . ReConFig, page 1-8. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing., , , and . ARCS, volume 9637 of Lecture Notes in Computer Science, page 130-142. Springer, (2016)NLICE: Synthetic Medical Record Generation for Effective Primary Healthcare Differential Diagnosis., , , , , and . BIBE, page 397-402. IEEE, (2023)Fletcher: A Framework to Efficiently Integrate FPGA Accelerators with Apache Arrow., , , , , and . FPL, page 270-277. IEEE, (2019)Tydi-Chisel: Collaborative and Interface-Driven Data-Streaming Accelerators., , , and . NorCAS, page 1-7. IEEE, (2023)Exploration of alternative GPU implementations of the pair-HMMs forward algorithm., , and . BIBM, page 902-909. IEEE Computer Society, (2016)Automated Hybrid Interconnect Design for FPGA Accelerators Using Data Communication Profiling., , and . IPDPS Workshops, page 151-160. IEEE Computer Society, (2014)Manifestation of Precharge Faults in High Speed DRAM Devices., , and . DDECS, page 179-184. IEEE Computer Society, (2007)Soft Faults and the Importance of Stresses in Memory Testing., and . DATE, page 1084-1091. IEEE Computer Society, (2004)DRAM Specific Approximation of the Faulty Behavior of Cell Defects., and . Asian Test Symposium, page 98-103. IEEE Computer Society, (2002)Impact of memory cell array bridges on the faulty behavior in embedded DRAMs., and . Asian Test Symposium, page 282-289. IEEE Computer Society, (2000)