Author of the publication

Fault Recovery Technique for TMR Softcore Processor System Using Partial Reconfiguration.

, , , , , , and . ICA3PP (1), volume 7439 of Lecture Notes in Computer Science, page 392-404. Springer, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Evaluation of fault tolerant technique based on homogeneous FPGA architecture., , , , , and . VLSI-SoC, page 225-230. IEEE, (2012)FPL Demo: An FPGA-IP Prototype Chip for MEC devices., , and . FPL, page 467. IEEE, (2022)Image Search System Based on Feature Vectors of Convolutional Neural Network., , and . TENCON, page 934-939. IEEE, (2020)Improving the Soft-error Tolerability of a Soft-core Processor on., , , , and . J. Next Gener. Inf. Technol., 2 (3): 35-48 (2011)A novel FPGA design framework with VLSI post-routing performance analysis (abstract only)., , , , , and . FPGA, page 271. ACM, (2013)Design Methodology.. Principles and Structures of FPGAs, Springer, (2018)A heuristic method of generating diameter 3 graphs for order/degree problem (invited paper)., and . NOCS, page 1-6. IEEE, (2016)An Embedded Reconfigurable IP Core with Variable Grain Logic Cell Architecture., , , , and . Int. J. Reconfigurable Comput., (2008)An Easily Testable Routing Architecture and Efficient Test Technique., , , , and . FPL, page 291-294. IEEE Computer Society, (2011)Three-dimensional stacking FPGA architecture using face-to-face integration., , , , , and . VLSI-SoC, page 192-197. IEEE, (2013)