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Disambiguation of "Sueyoshi, Toshinori"

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Fault Recovery Technique for TMR Softcore Processor System Using Partial Reconfiguration.

, , , , , , and . ICA3PP (1), volume 7439 of Lecture Notes in Computer Science, page 392-404. Springer, (2012)

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Toshinori Kuwahara

 

Other publications of authors with the same name

A novel FPGA design framework with VLSI post-routing performance analysis (abstract only)., , , , , and . FPGA, page 271. ACM, (2013)A novel states recovery technique for the TMR softcore processor., , , , , and . FPL, page 543-546. IEEE, (2009)Performance Estimation of TCP under SYN Flood Attacks., and . CISIS, page 92-99. IEEE Computer Society, (2007)An Anomaly Detection System Based on Chi-Square Method with Dynamic BIN Algorithm., , , and . BWCCA, page 549-554. IEEE Computer Society, (2011)An Easily Testable Routing Architecture and Efficient Test Technique., , , , and . FPL, page 291-294. IEEE Computer Society, (2011)Comparison of Properties between Entropy and Chi-Square Based Anomaly Detection Method., , and . NBiS, page 221-228. IEEE Computer Society, (2011)The Kyushu University reconfigurable parallel processor: design of memory and intercommunicaiton architectures., , , , and . ICS, page 351-360. ACM, (1989)An Embedded Reconfigurable IP Core with Variable Grain Logic Cell Architecture., , , , and . Int. J. Reconfigurable Comput., (2008)Improving the Soft-error Tolerability of a Soft-core Processor on., , , , and . J. Next Gener. Inf. Technol., 2 (3): 35-48 (2011)Evaluation of fault tolerant technique based on homogeneous FPGA architecture., , , , , and . VLSI-SoC, page 225-230. IEEE, (2012)