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Disambiguation of "Macchiarulo, Luca"

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Ternary Decision Diagrams with Inverted Edges and Cofactoring - An Application to Discrete Neural Networks Synthesis.

, and . ISMVL, page 58-64. IEEE Computer Society, (1998)

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Luca Rizzini

Luca Tranchini

Alfonz Luca

Luca Tuninetti

Marcello Lucà

 

Other publications of authors with the same name

Floorplan assisted data rate enhancement through wire pipelining: a real assessment., and . ISPD, page 121-128. ACM, (2005)Low-energy for deep-submicron address buses., , and . ISLPED, page 176-181. ACM, (2001)Adaptive Latency Insensitive Protocols and Elastic Circuits with Early Evaluation: A Comparative Analysis., and . FMGALS@DATE, volume 245 of Electronic Notes in Theoretical Computer Science, page 35-50. Elsevier, (2009)Ternary Decision Diagrams with Inverted Edges and Cofactoring - An Application to Discrete Neural Networks Synthesis., and . ISMVL, page 58-64. IEEE Computer Society, (1998)A Simplified Gate-Level Fault Model for Crosstalk Effects Analysis., , and . DFT, page 31-39. IEEE Computer Society, (2002)FPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits., , , , and . FPL, volume 2147 of Lecture Notes in Computer Science, page 493-502. Springer, (2001)Floorplanning for throughput., and . ISPD, page 62-69. ACM, (2004)Enhancing double-patterning detailed routing with lazy coloring and within-path conflict avoidance., and . DATE, page 1279-1284. IEEE Computer Society, (2010)An FPGA-Based Approach for Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits., , , , and . J. Electron. Test., 18 (3): 261-271 (2002)A comparison between mask- and field-programmable routing structures on industrial FPGA architectures., , and . ACM Great Lakes Symposium on VLSI, page 436-439. ACM, (2004)