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Integrating ns-3 model construction, description, preprocessing, execution, and visualization., , , , , , , и . SimuTools, стр. 176-181. ICST/ACM, (2013)Pushing the envelope in distributed ns-3 simulations: one billion nodes., , , , и . WNS3, стр. 67-74. ACM, (2015)Full-span structural compilation of DSP hardware., , , , , , и . ICASSP, стр. 495-498. IEEE, (1987)Serial/Parallel architectures for area-efficient vector multiplication., и . ICASSP, стр. 539-542. IEEE, (1987)Techniques to increase the computational throughput of bit-serial architectures., , и . ICASSP, стр. 543-546. IEEE, (1987)The Parallel Performance of a Groundwater Flow Code on the Cray T3D., , , и . PPSC, стр. 131-136. SIAM, (1995)Synthesis of area-efficient VLSI architectures for vector and matrix multiplication., и . IEEE Symposium on Computer Arithmetic, стр. 13-20. IEEE Computer Society, (1987)A comparison of micro-DSP and Silicon compiler implementations of a polyphase network filter bank., , , , , и . ICASSP, стр. 2207-2210. IEEE, (1986)The Multicomputer Toolbox - First-Generation Scalable Libraries., , , , , и . HICSS (2), стр. 644-654. IEEE Computer Society, (1994)Efficient bit-serial complex multiplication and sum-of-products computation using distributed arithmetic., и . ICASSP, стр. 2203-2206. IEEE, (1986)