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Disambiguation of "Abellán, José L."

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ECONO: Express coherence notifications for efficient cache coherency in many-core CMPs.

, , , and . ICSAMOS, page 237-244. IEEE, (2013)

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José Reyes L

Humberto Jorge José

Nadine José Gonzalez

José Baena

José Teixeira

 

Other publications of authors with the same name

Leveraging Silicon-Photonic NoC for Designing Scalable GPUs., , , , , and . ICS, page 273-282. ACM, (2015)STONNE: Enabling Cycle-Level Microarchitectural Simulation for DNN Inference Accelerators., , , and . IISWC, page 201-213. IEEE, (2021)Accelerating Polynomial Multiplication for Homomorphic Encryption on GPUs., , , , , , , , and . SEED, page 61-72. IEEE, (2022)Flexagon: A Multi-dataflow Sparse-Sparse Matrix Multiplication Accelerator for Efficient DNN Processing., , , , , and . ASPLOS (3), page 252-265. ACM, (2023)Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs., , , , , , and . DATE, page 491-496. IEEE, (2012)Valkyrie: Leveraging Inter-TLB Locality to Enhance GPU Performance., , , , , , , , and . PACT, page 455-466. ACM, (2020)Accelerating Drugs Discovery with Deep Reinforcement Learning: An Early Approach., , , , , and . ICPP Workshops, page 6:1-6:8. ACM, (2018)Design Space Exploration of Accelerators and End-to-End DNN Evaluation with TFLITE-SOC., , , , , , and . SBAC-PAD, page 10-19. IEEE, (2020)Secure communications in wireless network-on-chips., and . AISTECS@HiPEAC, page 27-32. ACM, (2017)A G-Line-Based Network for Fast and Efficient Barrier Synchronization in Many-Core CMPs., , and . ICPP, page 267-276. IEEE Computer Society, (2010)