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11.2 A 3D integrated Prototype System-on-Chip for Augmented Reality Applications Using Face-to-Face Wafer Bonded 7nm Logic at <2μm Pitch with up to 40% Energy Reduction at Iso-Area Footprint.

, , , , , , , , , , , , и . ISSCC, стр. 210-212. IEEE, (2024)

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Liu Liu

Liu Liu

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Yan Liu

 

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