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Implementation of AVS Jizhun decoder with HW/SW partitioning on a coarse-grained reconfigurable multimedia system.

L. Liu, Y. Chen, S. Yin, L. Zhou, H. Yuan, and S. Wei. Sci. China Inf. Sci., 57 (8): 1-14 (2014)

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Shouyi Zhang

Renfu Yin

Lu Yin

Li Yin

Other publications of authors with the same name

Hierarchical representation of on-chip context to reduce reconfiguration time and implementation area for coarse-grained reconfigurable architecture.Y. Wang, L. Liu, S. Yin, M. Zhu, P. Cao, J. Yang, and S. Wei. Sci. China Inf. Sci., 56 (11): 1-20 (2013)Implementation of AVS Jizhun decoder with HW/SW partitioning on a coarse-grained reconfigurable multimedia system.L. Liu, Y. Chen, S. Yin, L. Zhou, H. Yuan, and S. Wei. Sci. China Inf. Sci., 57 (8): 1-14 (2014)Memory-Aware Loop Mapping on Coarse-Grained Reconfigurable Architectures.S. Yin, X. Yao, D. Liu, L. Liu, and S. Wei. IEEE Trans. Very Large Scale Integr. Syst., 24 (5): 1895-1908 (2016)Energy Management on Battery-Powered Coarse-Grained Reconfigurable Platforms.P. Ouyang, S. Yin, L. Liu, and S. Wei. IEEE Trans. Very Large Scale Integr. Syst., 23 (12): 3085-3098 (2015)A Cycle-Accurate Simulator for a Reconfigurable Multi-Media System.M. Zhu, L. Liu, S. Yin, C. Yin, and S. Wei. IEICE Trans. Inf. Syst., 93-D (12): 3202-3210 (2010)An Ultra-Low Power Binarized Convolutional Neural Network-Based Speech Recognition Processor With On-Chip Self-Learning.S. Zheng, P. Ouyang, D. Song, X. Li, L. Liu, S. Wei, and S. Yin. IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (12): 4648-4661 (2019)PMCC: Fast and Accurate System-Level Power Modeling for Processors on Heterogeneous SoC.C. Deng, L. Liu, Y. Liu, S. Yin, and S. Wei. IEEE Trans. Circuits Syst. II Express Briefs, 64-II (5): 540-544 (2017)A Coarse-Grained Reconfigurable Architecture for Compute-Intensive MapReduce Acceleration.S. Liang, S. Yin, L. Liu, Y. Guo, and S. Wei. IEEE Comput. Archit. Lett., 15 (2): 69-72 (2016)A 2.92-Gb/s/W and 0.43-Gb/s/MG Flexible and Scalable CGRA-Based Baseband Processor for Massive MIMO Detection.G. Peng, L. Liu, S. Zhou, S. Yin, and S. Wei. IEEE J. Solid State Circuits, 55 (2): 505-519 (2020)Trainer: An Energy-Efficient Edge-Device Training Processor Supporting Dynamic Weight Pruning.Y. Wang, Y. Qin, D. Deng, J. Wei, T. Chen, X. Lin, L. Liu, S. Wei, and S. Yin. IEEE J. Solid State Circuits, 57 (10): 3164-3178 (2022)

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Disambiguation of "Yin, Shouyi"

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Implementation of AVS Jizhun decoder with HW/SW partitioning on a coarse-grained reconfigurable multimedia system.

Please choose a person to relate this publication to

Shouyi Zhang

Shouyi Zhang

Renfu Yin

Lu Yin

Li Yin

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yin, Shouyi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Implementation of AVS Jizhun decoder with HW/SW partitioning on a coarse-grained reconfigurable multimedia system.

Please choose a person to relate this publication to

Shouyi Zhang

Shouyi Zhang

Renfu Yin

Lu Yin

Li Yin

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Implementation of AVS Jizhun decoder with HW/SW partitioning on a coarse-grained reconfigurable multimedia system.