Author of the publication

A Lightweight, Plug-and-Play and Autonomous JTAG Authentication IP for Secure Device Testing.

, , , , , and . ETS, page 1-4. IEEE, (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Intra-Cell Defects Diagnosis., , , , , , and . J. Electron. Test., 30 (5): 541-555 (2014)On hardware generation of random single input change test sequences., , , , and . ETW, page 117-123. IEEE Computer Society, (2001)Random Adjacent Sequences: An Efficient Solution for Logic BIST., , , , and . VLSI-SOC, volume 218 of IFIP Conference Proceedings, page 413-424. Kluwer, (2001)Scan Cell Reordering for Peak Power Reduction during Scan Test Cycles., , , , and . VLSI-SoC, volume 240 of IFIP, page 267-281. Springer, (2005)A Selective Scan Slice Encoding Technique for Test Data Volume and Test Power Reduction., , , , , , and . J. Electron. Test., 24 (4): 353-364 (2008)An efficient hybrid power modeling approach for accurate gate-level power estimation., , , , and . ICM, page 17-20. IEEE, (2015)A Lightweight, Plug-and-Play and Autonomous JTAG Authentication IP for Secure Device Testing., , , , , and . ETS, page 1-4. IEEE, (2022)Approximate computing: Design & test for integrated circuits., , , and . LATS, page 1. IEEE, (2017)Parity prediction synthesis for nano-electronic gate designs., , , , , , and . ITC, page 820. IEEE Computer Society, (2010)Low-power SRAMs power mode control logic: Failure analysis and test solutions., , , , , , and . ITC, page 1-10. IEEE Computer Society, (2012)