Author of the publication

X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don't-Care Hardware Trojans to Shared Cloud FPGAs.

, , , , and . IEEE Access, (2024)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Active Wire Fences for Multitenant FPGAs., , , and . DDECS, page 13-20. IEEE, (2023)Mitigating the Last-Mile Bottleneck: A Two-Step Approach For Faster Commercial FPGA Routing., , , , and . FPGA, page 231. ACM, (2023)DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks., , , , and . IEEE Access, (2022)Deep Learning Detection of GPS Spoofing., , , , , and . LOD, volume 13163 of Lecture Notes in Computer Science, page 527-540. Springer, (2021)Shared FPGAs and the Holy Grail: Protections against Side-Channel and Fault Attacks., , , and . DATE, page 1645-1650. IEEE, (2021)FPGA-to-CPU Undervolting Attacks., , , and . DATE, page 999-1004. IEEE, (2022)Selective flexibility: Breaking the rigidity of datapath merging., , , , and . DATE, page 1543-1548. IEEE, (2012)X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don't-Care Hardware Trojans to Shared Cloud FPGAs., , , , and . IEEE Access, (2024)RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks., , and . IACR Cryptol. ePrint Arch., (2023)A Deep-Learning Approach to Side-Channel Based CPU Disassembly at Design Time., , , and . DATE, page 670-675. IEEE, (2022)