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Disambiguation of "Masui, Shoichi"

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9.7 A 0.33nJ/b IEEE802.15.6/proprietary-MICS/ISM-band transceiver with scalable data-rate from 11kb/s to 4.5Mb/s for medical applications.

, , , , , , , , , , , , , , and . ISSCC, page 170-171. IEEE, (2014)

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Shoichi Watanabe

 

Other publications of authors with the same name

A Passive UHF RF Identification CMOS Tag IC Using Ferroelectric RAM in 0.35-µm Technology., , , , , , , , , and . IEEE J. Solid State Circuits, 42 (1): 101-110 (2007)Design Optimization of a High-Speed, Area-Efficient and Low-Power Montgomery Modular Multiplier for RSA Algorithm., , , and . IEICE Trans. Electron., 88-C (4): 576-581 (2005)A Passive UHF RFID Tag LSI with 36.6% Efficiency CMOS-Only Rectifier and Current-Mode Demodulator in 0.35µm FeRAM Technology., , , , , , , , , and . ISSCC, page 1201-1210. IEEE, (2006)An ultra-low-power RF transceiver with a 1.5-pJ/bit maximally-digital impulse-transmitter and an 89.5-μW super-regenerative RSSI., , , , , , , and . A-SSCC, page 265-268. IEEE, (2014)Design of Complex BPF with Automatic Digital Tuning Circuit for Low-IF Receivers., , , and . IEICE Trans. Electron., 92-C (10): 1304-1310 (2009)A 3.5mW 5µsec settling time dual-band fractional-N PLL synthesizer., and . IEICE Electron. Express, 9 (4): 307-313 (2012)Radio channel characterization for 400 MHz implanted devices., , , , , , , and . WCNC, page 293-298. IEEE, (2014)A 32-bit 16-program-cycle nonvolatile memory for analog circuit calibration in a standard 0.18µm CMOS., and . IEICE Electron. Express, 9 (6): 477-483 (2012)Design and applications of ferroelectric nonvolatile SRAM and flip-flop with unlimited read/program cycles and stable recall., , , , , , and . CICC, page 403-406. IEEE, (2003)SoccerNet 2022 Challenges Results., , , , , , , , , and 84 other author(s). MMSports@MM, page 75-86. ACM, (2022)