Author of the publication

Maestro: A Memory-on-Logic Architecture for Coordinated Parallel Use of Many Systolic Arrays.

, , , , and . ASAP, page 42-50. IEEE, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

RTN: Reparameterized Ternary Network., , , , , and . CoRR, (2019)TCAM space-efficient routing in a software defined network., , , , , , and . Comput. Networks, (2017)Network Function Virtualization enabled multicast routing on SDN., , , and . ICC, page 5595-5601. IEEE, (2015)Aurora: Adaptive Block Replication in Distributed File Systems., , , and . ICDCS, page 442-451. IEEE Computer Society, (2015)Systolic Building Block for Logic-on-Logic 3D-IC Implementations of Convolutional Neural Networks., , , , , , , , , and . ISCAS, page 1-5. IEEE, (2019)DLoRA: Distributed Parameter-Efficient Fine-Tuning Solution for Large Language Model., and . CoRR, (2024)Parameter-Efficient Fine-Tuning for Large Models: A Comprehensive Survey., , , , and . CoRR, (2024)A Machine Learning Assisted Cell Selection Method for Drones in Cellular Networks., , , , and . SPAWC, page 1-5. IEEE, (2018)Kaleidoscope: Real-time content delivery in software defined infrastructures., , , , and . IM, page 686-692. IEEE, (2015)SphereFed: Hyperspherical Federated Learning., , , and . ECCV (26), volume 13686 of Lecture Notes in Computer Science, page 165-184. Springer, (2022)