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Disambiguation of "Egawa, Ryusuke"

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Exploiting the Potentials of the Second Generation SX-Aurora TSUBASA.

, , , , , , and . PMBS@SC, page 39-49. IEEE, (2020)

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Ryusuke Shimada

Masashi Egawa

Yuko Egawa

Kazuko Pfeiffer-Egawa

 

Other publications of authors with the same name

Design of a 3-D stacked floating-point adder., , and . 3DIC, page 1-4. IEEE, (2013)Improving the Accuracy in SpMV Implementation Selection with Machine Learning., , , , and . CANDAR (Workshops), page 172-177. IEEE, (2020)Performance Evaluation of a Next-Generation SX-Aurora TSUBASA Vector Supercomputer., , , , , , and . ISC, volume 13948 of Lecture Notes in Computer Science, page 359-378. Springer, (2023)A power-aware shared cache mechanism based on locality assessment of memory reference for CMPs., , , and . MEDEA@PACT, page 113-120. ACM, (2007)Modeling of cache access behavior based on Zipf's law., , , and . MEDEA@PACT, page 9-15. ACM, (2008)A Systolic Memory Architecture for Fast Codebook Design based on MMPDCL Algorithm., , , , and . ITCC (1), page 572-578. IEEE Computer Society, (2004)Foreword., and . IEICE Trans. Electron., 106 (6): 301-302 (June 2023)Design and evaluation of a media-oriented vector processor with a multi-banked cache memory., , , , and . ESTIMedia, page 78-87. IEEE, (2013)Peachy Parallel Assignments (EduHPC 2019)., , , , , , , , , and 2 other author(s). EduHPC@SC, page 75-83. IEEE, (2019)3D on-chip memory for the vector architecture., , , and . 3DIC, page 1-6. IEEE, (2009)