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Disambiguation of "Dong, Qing"

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An Adaptive Body-Biaslna SoC Using in Situ Slack Monitoring for Runtime Replica Calibration.

, , , , , , , , , and . VLSI Circuits, page 63-64. IEEE, (2018)

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Qing Shengzu

Lan Qing

Li Qing

Ma Qing

Qing Ye

 

Other publications of authors with the same name

South China Sea internal wave analysis using radar imagery., , , , , and . IGARSS, page 3008-3010. IEEE, (2002)How does partitioning matter for 3D floorplanning?, , , and . ACM Great Lakes Symposium on VLSI, page 73-78. ACM, (2006)A 1.02nW PMOS-only, trim-free current reference with 282ppm/°C from -40°C to 120°C and 1.6% within-wafer inaccuracy., , , , and . ESSCIRC, page 19-22. IEEE, (2017)3.7 A 1920×1080 30fps 2.3TOPS/W stereo-depth processor for robust autonomous navigation., , , , , , , , , and . ISSCC, page 62-63. IEEE, (2017)15.3 A 351TOPS/W and 372.4GOPS Compute-in-Memory SRAM Macro in 7nm FinFET CMOS for Machine-Learning Applications., , , , , , , and . ISSCC, page 242-244. IEEE, (2020)Low-Power and Low-Variability Programmable Delay Element and Its Application to Post-Silicon Skew Tuning., , , and . ISVLSI, page 167-171. IEEE Computer Society, (2015)A 0.04MM316NW Wireless and Batteryless Sensor System with Integrated Cortex-M0+ Processor and Optical Communication for Cellular Temperature Measurement., , , , , , , , , and 6 other author(s). VLSI Circuits, page 191-192. IEEE, (2018)A General-Purpose CRN-to-DSD Compiler with Formal Verification, Optimization, and Simulation Capabilities., , , , , and . DNA, volume 10467 of Lecture Notes in Computer Science, page 232-248. Springer, (2017)Cost-sensitive Classifier Selection when there is Additional Cost Information., , , , , , , and . COST@SDM, volume 88 of Proceedings of Machine Learning Research, page 17-30. PMLR, (2018)Post-placement STI well width adjusting by geometric programming for device mobility enhancement in critical path., , , and . ISCAS, page 929-932. IEEE, (2010)