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Circuits and technologies for highly integrated optical networking ICs at 10 Gb/s to 40 Gb/s., , , , , , , , , and 2 other author(s). CICC, page 331-338. IEEE, (2001)A Second Order Delta-Sigma Frequency Discriminator with Fractional-N Divider and Multi-Bit Quantizer., , , and . ISCAS, page 1689-1692. IEEE, (2007)A Sigma-Delta Frequency Discriminator Based Synthesizer., , , and . ISCAS, page 1-4. IEEE, (1995)A Sampled Analog MOS LSI Adaptive Filter., , and . IEEE Trans. Commun., 27 (2): 406-412 (1979)A 1.9 GHz low-voltage silicon bipolar receiver front-end for wireless personal communications systems., and . IEEE J. Solid State Circuits, 30 (12): 1438-1448 (December 1995)VLSI for analog/digital communications.. IEEE Commun. Mag., 29 (5): 25-30 (1991)Bit-Error Rate Measurements for A High Frequency Interpolated Frequency-Hopping Spread-Spectrum System., , , and . ISCAS, page 97-100. IEEE, (1995)A 1.9-GHz silicon receiver with monolithic image filtering., and . IEEE J. Solid State Circuits, 33 (3): 378-386 (1998)The modeling, characterization, and design of monolithic inductors for silicon RF IC's., and . IEEE J. Solid State Circuits, 32 (3): 357-369 (1997)A receive path ΔΣ frequency to digital converter., , , and . ISCAS, page 331-334. IEEE, (2000)