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A 4.8 GS/s 5-bit ADC-Based Receiver With Embedded DFE for Signal Equalization., and . IEEE J. Solid State Circuits, 44 (3): 901-915 (2009)Introduction to the Special Issue on the 2005 IEEE International Solid-State Circuits Conference., , , and . IEEE J. Solid State Circuits, 41 (1): 3-6 (2006)Effects of Active Cooling on Workload Management in High Performance Processors., and . CLOSER, page 5-16. SciTePress, (2015)An 85%-Efficiency Hybrid DC-DC Converter for Sub-Microwatt IoT Applications., and . MWSCAS, page 9-12. IEEE, (2019)CMOS LC oscillator using variable mean frequency., , and . CICC, page 147-150. IEEE, (2003)A 4.6GHz MDLL with -46dBc reference spur and aperture position tuning., , , , and . ISSCC, page 466-468. IEEE, (2011)Device-circuit co-optimization for mixed-mode circuit design via geometric programming., , , and . ICCAD, page 470-475. IEEE Computer Society, (2007)Minimizing the Supply Sensitivity of a CMOS Ring Oscillator Through Jointly Biasing the Supply and Control Voltages., , and . IEEE J. Solid State Circuits, 44 (9): 2488-2495 (2009)A 100+ Meter 12 Gb/s/Lane Copper Cable Link Based on Clock-Forwarding., , , and . IEEE J. Solid State Circuits, 48 (4): 1085-1098 (2013)A 600-MS/s 5-bit pipeline A/D converter using digital reference calibration., and . IEEE J. Solid State Circuits, 41 (2): 310-319 (2006)