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A new approach for encryption system based on block cipher algorithms and logistic function., , , и . SSD, стр. 1-5. IEEE, (2015)Performance evaluation and design considerations of lightweight block cipher for low-cost embedded devices., , , , , и . AICCSA, стр. 1-7. IEEE Computer Society, (2016)A design methodology for IP integration., , и . ISCAS (4), стр. 711-714. IEEE, (2002)MIC@R : A Generic Low Latency Router for On-Chip Networks., , и . ICECS, стр. 999-1002. IEEE, (2007)Efficient Hybrid Encryption System Based on Block Cipher and Chaos Generator., , , , , и . CIT, стр. 375-382. IEEE Computer Society, (2016)IP cores integration in DSP System-on-chip designs., , и . EUSIPCO, стр. 1-4. IEEE, (2002)A simulation based approach for incorporating virtual components IP cores into multimedia systems design., , , и . ICME, стр. 817-820. IEEE Computer Society, (2003)Virtual component IP re-use in telecommunication systems design: a case study of MPEG-2/JPEG2000 encoder., , и . ICECS, стр. 733-736. IEEE, (2002)A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration., , , , и . DATE, стр. 20250-20255. IEEE Computer Society, (2003)A Reconfigurable Implementation of the New Secure Hash Algorithm., , , , и . ARES, стр. 281-285. IEEE Computer Society, (2007)