Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Cocco: Hardware-Mapping Co-Exploration towards Memory Capacity-Communication Optimization.

Z. Tan, Z. Zhu, and K. Ma. ASPLOS (1), page 69-84. ACM, (2024)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Dao Tan

Albert Tan

Vivien Tan

Ming Tan

Tangsheng Tan

Other publications of authors with the same name

A Scalable Multi-Chiplet Deep Learning Accelerator with Hub-Side 2.5D Heterogeneous Integration.Z. Tan, Y. Wu, Y. Zhang, H. Shi, W. Zhang, and K. Ma. HCS, page 1-17. IEEE, (2023)Cocco: Hardware-Mapping Co-Exploration towards Memory Capacity-Communication Optimization.Z. Tan, Z. Zhu, and K. Ma. ASPLOS (1), page 69-84. ACM, (2024)SCAN: A Scalable Neural Networks Framework Towards Compact and Efficient Models.L. Zhang, Z. Tan, J. Song, J. Chen, C. Bao, and K. Ma. NeurIPS, page 4029-4038. (2019)PCNN: Pattern-based Fine-Grained Regular Pruning Towards Optimizing CNN Accelerators.Z. Tan, J. Song, X. Ma, S. Tan, H. Chen, Y. Miao, Y. Wu, S. Ye, Y. Wang, D. Li and 1 other author(s). DAC, page 1-6. IEEE, (2020)NN-Baton: DNN Workload Orchestration and Chiplet Granularity Exploration for Multichip Accelerators.Z. Tan, H. Cai, R. Dong, and K. Ma. ISCA, page 1013-1026. IEEE, (2021)YOLoC: deploy large-scale neural network by ROM-based computing-in-memory using residual branch on a chip.Y. Chen, G. Yin, Z. Tan, M. Lee, Z. Yang, Y. Liu, H. Yang, K. Ma, and X. Li. DAC, page 1093-1098. ACM, (2022)Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators.J. Cai, Z. Wu, S. Peng, Y. Wei, Z. Tan, G. Shi, M. Gao, and K. Ma. HPCA, page 156-171. IEEE, (2024)Finding the Task-Optimal Low-Bit Sub-Distribution in Deep Neural Networks.R. Dong, Z. Tan, M. Wu, L. Zhang, and K. Ma. ICML, volume 162 of Proceedings of Machine Learning Research, page 5343-5359. PMLR, (2022)A 28nm 68MOPS 0.18\muJ/Op$ Paillier Homomorphic Encryption Processor with Bit-Serial Sparse Ciphertext Computing.G. Shi, Z. Tan, D. Cao, J. Cai, W. Zhang, Y. Wu, and K. Ma. ISSCC, page 242-243. IEEE, (2023)PHEP: Paillier Homomorphic Encryption Processors for Privacy-Preserving Applications in Cloud Computing.G. Shi, Y. Li, X. Wang, Z. Tan, D. Cao, J. Cai, Y. Wei, Z. Li, W. Zhang, Y. Wu and 2 other author(s). HCS, page 1-20. IEEE, (2023)

BibSonomy

Disambiguation of "Tan, Zhanhong"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Cocco: Hardware-Mapping Co-Exploration towards Memory Capacity-Communication Optimization.

Please choose a person to relate this publication to

Dao Tan

Albert Tan

Vivien Tan

Ming Tan

Tangsheng Tan

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Tan, Zhanhong"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Cocco: Hardware-Mapping Co-Exploration towards Memory Capacity-Communication Optimization.

Please choose a person to relate this publication to

Dao Tan

Albert Tan

Vivien Tan

Ming Tan

Tangsheng Tan

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Cocco: Hardware-Mapping Co-Exploration towards Memory Capacity-Communication Optimization.