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Towards the Integration of Reliability and Security Mechanisms to Enhance the Fault Resilience of Neural Networks.

, , , , and . IEEE Access, (2021)

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Encryption-Based Secure JTAG., , , , and . DDECS, page 1-6. IEEE, (2019)Compute-In-Place Serial FeRAM: Enhancing Performance, Efficiency and Adaptability in Critical Embedded Systems., , , , , , and . VLSI-SoC, page 1-6. IEEE, (2023)A Secure Scan Controller for Protecting Logic Locking., , , , and . IOLTS, page 1-6. IEEE, (2020)Post-Quantum Cryptography: Challenges and Opportunities for Robust and Secure HW Design., , , , , , , and . DFT, page 1-6. IEEE, (2021)Hardware Accelerator for FIPS 202 Hash Functions in Post-Quantum Ready SoCs., , , , , , and . IOLTS, page 1-6. IEEE, (2024)SECCS: SECure Context Saving for IoT Devices., , , , , and . CoRR, (2019)A New Secure Stream Cipher for Scan Chain Encryption., , , , , and . IVSW, page 68-73. IEEE, (2018)Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs., , , , , , , , , and 5 other author(s). IOLTS, page 1-4. IEEE, (2020)On the optimization of SBST test program compaction., , , , and . DFT, page 1-4. IEEE Computer Society, (2017)Evaluating the Code Encryption Effects on Memory Fault Resilience., , , , and . LATS, page 1-6. IEEE, (2020)