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On-chip power network optimization with decoupling capacitors and controlled-ESRs.

, , , , , , , and . ASP-DAC, page 119-124. IEEE, (2010)

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On-chip power network optimization with decoupling capacitors and controlled-ESRs., , , , , , , and . ASP-DAC, page 119-124. IEEE, (2010)Power network analysis and optimization.. University of California, San Diego, USA, (2009)Proximity and average eccentricity of a graph., , and . Inf. Process. Lett., 112 (10): 392-395 (2012)Incremental Power Impedance Optimization Using Vector Fitting Modeling., and . ISCAS, page 2439-2442. IEEE, (2007)Binarized features with discriminant manifold filters for robust single-sample face recognition., , , , , and . Signal Process. Image Commun., (2018)Clock Skew Analysis via Vector Fitting in Frequency Domain., , , , and . ISQED, page 476-479. IEEE Computer Society, (2008)3D stacked power distribution considering substrate coupling., , , , , , and . ICCD, page 225-230. IEEE Computer Society, (2009)Predicting the worst-case voltage violation in a 3D power network., , , , , and . SLIP, page 93-98. ACM, (2009)Efficient power network analysis with complete inductive modeling., , , , , and . ISQED, page 770-775. IEEE Computer Society, (2009)Parallel flow to analyze the impact of the voltage regulator model in nanoscale power distribution network., , , , , , , , , and . ISQED, page 576-581. IEEE Computer Society, (2009)