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Simultaneous scheduling and binding for resource usage and interconnect complexity reduction in high-level synthesis., , , и . ASICON, стр. 1-4. IEEE, (2015)Register placement for high-performance circuits., , и . DATE, стр. 1470-1475. IEEE, (2009)Power and resource aware scheduling with multiple voltages., , , , и . ASICON, стр. 1-4. IEEE, (2013)Floorplanning driven Network-on-Chip synthesis for 3-D SoCs., , , , и . ISCAS, стр. 1203-1206. IEEE, (2011)Mobility overlap-removal based leakage power aware scheduling in high-level synthesis., , , и . ISCAS, стр. 1745-1748. IEEE, (2013)Network simplex method based Multiple Voltage Scheduling in Power-efficient High-level synthesis., , и . ASP-DAC, стр. 237-242. IEEE, (2013)Double feedback streaming agent for real-time delivery of media over 3G wireless networks., , и . WCNC, стр. 2102-2106. IEEE, (2003)Multiple-Reference Compression of RTP/UDP/IP Headers for Mobile Multimedia Communications., , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 85-A (7): 1491-1500 (2002)Construction of an (r11, r12, r22)-Tournament from a Score Sequence Pair., , и . ISCAS, стр. 3403-3406. IEEE, (2007)Genetic Algorithm based pipeline scheduling in high-level synthesis., и . ASICON, стр. 1-4. IEEE, (2013)