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Disambiguation of "Sen, Bibhash"

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Design of Fault Tolerant Reversible Arithmetic Logic Unit in QCA.

, , , , and . ISED, page 241-245. IEEE, (2012)

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Nikhilranjan Sen

Ramen Sen

Sen Ye

Parimal Sen

Miktat Sen

 

Other publications of authors with the same name

Regular clocking-based Automated Cell Placement technique in QCA targeting sequential circuit., , , , , , and . Comput. Electr. Eng., (2022)Towards modular design of reliable quantum-dot cellular automata logic circuit using multiplexers., , , and . Comput. Electr. Eng., (2015)A Realistic Configurable Level Triggered Flip-Flop in Quantum-Dot Cellular Automata., , and . VDAT, volume 1066 of Communications in Computer and Information Science, page 455-467. Springer, (2019)Design of fault tolerant majority voter for TMR circuit in QCA., , , and . VDAT, page 1-2. IEEE, (2016)Introducing universal QCA logic gate for synthesizing symmetric functions with minimum wire-crossings., , and . ICWET, page 828-833. ACM, (2010)Synthesis of Reversible Universal Logic around QCA with Online Testability., , , and . ISED, page 236-241. IEEE Computer Society, (2011)Towards Designing Reliable Universal QCA Logic in the Presence of Cell Deposition Defect., , , , and . VLSID, page 575-576. IEEE Computer Society, (2016)Design and Analysis of Regular Clock Based 2: 4 Decoder Using T-Gate in QCA., , , and . ASCAT, volume 1443 of Advances in Intelligent Systems and Computing, page 81-91. Springer, (2023)Design of fault tolerant majority voter for error resilient TMR targeting micro to nano scale logic., , , and . Int. J. Comput. Sci. Eng., 21 (3): 375-393 (2020)Design of Configurable Sequential Circuits in Quantum-dot Cellular Automata., , and . CoRR, (2017)