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Disambiguation of "Noll, Tobias G."

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Analysis of the area-delay performance of hybrid nanoelectronic memory cores used in field programmable gate arrays.

, , and . ACM Great Lakes Symposium on VLSI, page 233-238. ACM, (2013)

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Tobias Nöll

Tobias Noll

Tobias Noll

Tobias Gebhard Noll

Tobias G Wenzl

 

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An accurate power estimation model for low-power hierarchical-architecture SRAMs., and . VLSI-SoC, page 144-149. IEEE, (2013)A radix-4 single-precision floating point divider based on digit set interleaving., and . ISCAS, page 709-712. IEEE, (2010)Noise Margin Based Library Optimization Considering Variability in Sub-threshold., , and . PATMOS, volume 7606 of Lecture Notes in Computer Science, page 72-82. Springer, (2012)A Physically Oriented Model to Quantify the Noise-on-Delay Effect., and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 879-888. Springer, (2004)Classification Framework for Analysis and Modeling of Physically Induced Reliability Violations., , , , , , , and . ACM Comput. Surv., 47 (3): 38:1-38:33 (2015)A hybrid CMOS/memristive nanoelectronic circuit for programming synaptic weights., and . ESANN, (2012)Verbesserung der Dynamik und Ortsauflösung in der Ultraschalldiagnostik durch die Kombination kodierter Anregung und tiefenangepaßter Mismatched-Filterung., , , and . Bildverarbeitung für die Medizin, volume 12 of CEUR Workshop Proceedings, Springer, (1998)Artefaktreduzierung in der ultraschnellen Magnetresonanz-Bildgebung mittels inverser Filterung im Ortsfrequenzbereich., , and . Bildverarbeitung für die Medizin, volume 6 of CEUR Workshop Proceedings, CEUR-WS.org, (1996)A new scalable VLSI architecture for Reed-Solomon decoders., , and . CICC, page 13-16. IEEE, (1998)Implementation of scalable power and area efficient high-throughput Viterbi decoders., , and . IEEE J. Solid State Circuits, 37 (7): 941-948 (2002)