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PALF: compiler supports for irregular register files in clustered VLIW DSP processors.

, , и . Concurr. Comput. Pract. Exp., 19 (18): 2391-2406 (2007)

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Yung Sheng Lin

Chia-Lin Lee

Chia-Ching Lin

Chia-Liang Lin

Chia-Huey Lin

 

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Case Study: Support OpenCL Complex Class for Baseband Computing., , , и . IWOCL, стр. 23:1-23:2. ACM, (2019)PALF: compiler supports for irregular register files in clustered VLIW DSP processors., , и . Concurr. Comput. Pract. Exp., 19 (18): 2391-2406 (2007)Power-Aware Scheduling for Parallel Security Processors with Analytical Models., , , , , и . LCPC, том 3602 из Lecture Notes in Computer Science, стр. 470-484. Springer, (2004)Enhancing Microkernel Performance on VLIW DSP Processors via Multiset Context Switch., , , и . J. Signal Process. Syst., 51 (3): 257-268 (2008)Energy-aware scheduling and simulation methodologies for parallel security processors with multiple voltage domains., , , , , и . J. Supercomput., 42 (2): 201-223 (2007)Guest Editorial: Special Issue on Systems Optimizations for DSP and AI Applications., , и . J. Signal Process. Syst., 95 (5): 569-570 (мая 2023)Compiler Optimizations with DSP-Specific Semantic Descriptions., , и . LCPC, том 2481 из Lecture Notes in Computer Science, стр. 75-89. Springer, (2002)Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores., , , , , , и . J. Signal Process. Syst., 51 (3): 269-288 (2008)An MILP-based wire spreading algorithm for PSM-aware layout modification., , и . ASP-DAC, стр. 364-369. IEEE, (2008)System-level design space exploration for security processor prototyping in analytical approaches., , и . ASP-DAC, стр. 376-380. ACM Press, (2005)