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A 56-nm CMOS 99-mm2 8-Gb Multi-Level NAND Flash Memory With 10-MB/s Program Throughput., , , , , , , , , and 25 other author(s). IEEE J. Solid State Circuits, 42 (1): 219-232 (2007)Circuit techniques for a 1.8-V-only NAND flash memory., , , and . IEEE J. Solid State Circuits, 37 (1): 84-89 (2002)Understanding the Relation Between the Performance and Reliability of nand Flash/SCM Hybrid Solid-State Drive., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (6): 2208-2219 (2016)A High Performance and Energy-Efficient Cold Data Eviction Algorithm for 3D-TSV Hybrid ReRAM/MLC NAND SSD., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (2): 382-392 (2014)NAND Flash Memory/ReRAM Hybrid Unified Solid-State-Storage Architecture., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (4): 1119-1132 (2014)Improvement of Read Margin and Its Distribution by VTH Mismatch Self-Repair in 6T-SRAM With Asymmetric Pass Gate Transistor Formed by Post-Process Local Electron Injection., , , , and . IEEE J. Solid State Circuits, 46 (9): 2180-2188 (2011)Ferroelectric (Fe)-NAND Flash Memory With Batch Write Algorithm and Smart Data Store to the Nonvolatile Page Buffer for Data Center Application High-Speed and Highly Reliable Enterprise Solid-State Drives., , , , , , , and . IEEE J. Solid State Circuits, 45 (10): 2156-2164 (2010)7.7 Enterprise-grade 6x fast read and 5x highly reliable SSD with TLC NAND-flash memory for big-data storage., , , , , and . ISSCC, page 1-3. IEEE, (2015)A 1.8V 30nJ adaptive program-voltage (20V) generator for 3D-integrated NAND flash SSD., , , , , , and . ISSCC, page 238-239. IEEE, (2009)Versatile TLC NAND flash memory control to reduce read disturb errors by 85% and extend read cycles by 6.7-times of Read-Hot and Cold data for cloud data centers., , and . VLSI Circuits, page 1-2. IEEE, (2016)