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A Study on Coarse Stage Bit Allocation to Improve Power Efficiency of a 10-bit Coarse-Fine SAR ADC Implemented in 65nm CMOS Process for Environmental Sensing Applications.

U. Agub, J. Aquino, J. Beano, R. Monsayac, A. Alvarez, M. de Leon, C. Densing, J. Hizon, R. Maestro, and M. Rosales. TENCON, page 1352-1356. IEEE, (2018)

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Maria Leon

Theresa de Sousa

Maria-Theresa Müller

Maria Theresa Redaniel

Theresa Maria Müller

Other publications of authors with the same name

Low Power Converter for Capacitive Sensors Using Capacitance-to-Pulse Width Modulation.A. Balde, J. Cabuyadao, C. Densing, J. Hizon, M. Rosales, R. Maestro, and M. de Leon. TENCON, page 570-573. IEEE, (2018)A Study on Coarse Stage Bit Allocation to Improve Power Efficiency of a 10-bit Coarse-Fine SAR ADC Implemented in 65nm CMOS Process for Environmental Sensing Applications.U. Agub, J. Aquino, J. Beano, R. Monsayac, A. Alvarez, M. de Leon, C. Densing, J. Hizon, R. Maestro, and M. Rosales. TENCON, page 1352-1356. IEEE, (2018)Design and Implementation a Self-starting Thermal Energy Harvester with Resonant Startup and Maximum Power Point Tracking Capabilities/or Wireless Sensor Nodes.P. Panis, M. Ralota, J. Matanguihan, A. Alvarez, J. Hizon, M. Rosales, C. Santos, and M. de Leon. ISOCC, page 95-96. IEEE, (2019)A 288nV/√Hz low-noise capacitively-coupled instrumentation amplifier (CCIA) in 22-nm UTBB FD-SOI for signal conditioning of MEMS piezoresistive pressure sensors.A. Ramones, P. Villacorta, K. Juruena, T. Obar, J. Siglos, J. Manzano, Z. Sanchez, A. Leynes, M. Ralota, J. Hizon and 2 other author(s). ISOCC, page 267-268. IEEE, (2023)FPGA-based Features Extraction Sensor for Lettuce Crop.M. Adonis, R. Forteza, A. Ramos, A. Alvarez, M. de Leon, J. Hizon, M. Sabino-Santos, C. Santos, and M. Rosales. TENCON, page 269-273. IEEE, (2020)Comparison of hardware-optimized CNN and SVM models for human activity recognition using the HARTH and HAR 70 + datasets.K. Palabasan, R. Rajagopalan, J. Manzano, M. Rosales, M. de Leon, and J. Hizon. ISOCC, page 107-108. IEEE, (2023)A gm/ID Based Algorithm for the Design of CMOS Miller Operational Amplifiers in 65 nm Technology.Z. Sanchez, S. Vasquez, A. Alvarez, C. Densing, J. Hizon, R. Maestro, M. de Leon, and M. Rosales. TENCON, page 1870-1875. IEEE, (2018)An Energy-Efficient Temperature Sensor Using CMOS Thyristor Delay Elements.I. Fernandez, M. de Leon, A. Alvarez, and M. Rosales. ICM, page 1-4. IEEE, (2020)Designing a Class E Power Amplifier through Modeling in Verilog-A.A. Ting, A. Alvarez, M. de Leon, M. Rosales, M. Sabino-Santos, J. Hizon, and C. Santos. ISOCC, page 93-94. IEEE, (2020)Design Space Exploration of a 512KB STT-Assisted SOT MRAM Cache.A. Caburnay, J. Reyes, A. Ballesil-Alvarez, M. de Leon, J. Hizon, M. Rosales, C. Santos, and M. Sabino. ISOCC, page 145-146. IEEE, (2020)

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Disambiguation of "de Leon, Maria Theresa G."