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A processor core synthesis system in IP-based SoC design., , , , , , and . ASP-DAC, page 286-291. ACM Press, (2005)A cosynthesis algorithm for application specific processors with heterogeneous datapaths., , , and . ASP-DAC, page 250-255. IEEE Computer Society, (2004)Instruction set and functional unit synthesis for SIMD processor cores., , , , and . ASP-DAC, page 743-750. IEEE Computer Society, (2004)Sub-operation parallelism optimization in SIMD processor synthesis and its experimental evaluations., , , , , and . ISCAS (4), page 3499-3502. IEEE, (2005)A Hardware/Software Partitioning Algorithm for Processor Cores with Packed SIMD-Type Instructions., , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 86-A (12): 3218-3224 (2003)An interface-circuit synthesis method with configurable processor core in IP-based SoC designs., , , , , , and . ASP-DAC, page 594-599. IEEE, (2006)Sub-operation Parallelism Optimization in SIMD Processor Core Synthesis., , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 88-A (4): 876-884 (2005)An algorithm of hardware unit generation for processor core synthesis with packed SIMD type instructions., , , , and . APCCAS (1), page 171-176. IEEE, (2002)A hardware/software partitioning algorithm for SIMD processor cores., , , , , and . ASP-DAC, page 135-140. ACM, (2003)Area/delay estimation for digital signal processor cores., , , , and . ASP-DAC, page 156-161. ACM, (2001)