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Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databases.

, , , , и . ISVLSI, стр. 273-278. IEEE, (2022)

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Pegah Boroumand

Amirali Shirazibeheshti

Amirali Sattatrzadeh Mohammadi

 

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Practical Mechanisms for Reducing Processor-Memory Data Movement in Modern Workloads.. Carnegie Mellon University, USA, (2021)LazyPIM: Efficient Support for Cache Coherence in Processing-in-Memory Architectures., , , , , , , , , и . CoRR, (2017)Enabling the Adoption of Processing-in-Memory: Challenges, Mechanisms, Future Research Directions., , , , и . CoRR, (2018)Ambit: in-memory accelerator for bulk bitwise operations using commodity DRAM technology., , , , , , , , , и . MICRO, стр. 273-287. ACM, (2017)Using ECC DRAM to Adaptively Increase Memory Capacity., , , , , , , и . CoRR, (2017)Accelerating Neural Network Inference with Processing-in-DRAM: From the Edge to the Cloud., , , , и . CoRR, (2022)Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databases., , , , и . ISVLSI, стр. 273-278. IEEE, (2022)Buddy-RAM: Improving the Performance and Efficiency of Bulk Bitwise Operations Using DRAM., , , , , , , , , и . CoRR, (2016)Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks., , , , , , , , , и 1 other автор(ы). ASPLOS, стр. 316-331. ACM, (2018)Gather-scatter DRAM: in-DRAM address translation to improve the spatial locality of non-unit strided accesses., , , , , , и . MICRO, стр. 267-280. ACM, (2015)