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DaPPA: A Data-Parallel Framework for Processing-in-Memory Architectures., , , , and . CoRR, (2023)PUMA: Efficient and Low-Cost Memory Allocation and Alignment Support for Processing-Using-Memory Architectures., , , and . CoRR, (2024)Employing classification-based algorithms for general-purpose approximate computing., , , , and . DAC, page 70:1-70:6. ACM, (2018)HARP: Practically and Effectively Identifying Uncorrectable Errors in Memory Chips That Use On-Die Error-Correcting Codes., , and . MICRO, page 623-640. ACM, (2021)Methodologies, Workloads, and Tools for Processing-in-Memory: Enabling the Adoption of Data-Centric Architectures., , , and . ISVLSI, page 261-266. IEEE, (2022)Accelerating Neural Network Inference with Processing-in-DRAM: From the Edge to the Cloud., , , , and . CoRR, (2022)Benchmarking a New Paradigm: An Experimental Analysis of a Real Processing-in-Memory Architecture., , , , , and . CoRR, (2021)Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databases., , , , and . ISVLSI, page 273-278. IEEE, (2022)Operand size reconfiguration for big data processing in memory., , , , , and . DATE, page 710-715. IEEE, (2017)Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis., , , , , , , , , and . HPCA, page 280-296. IEEE, (2024)