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A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS.

A. Roshan-Zamir, T. Iwai, Y. Fan, A. Kumar, H. Yang, L. Sledjeski, J. Hamilton, S. Chandramouli, A. Aude, and S. Palermo. IEEE J. Solid State Circuits, 54 (3): 672-684 (2019)

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Ankur Ajmera

Ankur Patel

Ankur Agarwal

Ankur Kamthe

Ankur Sinha

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A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS.A. Roshan-Zamir, T. Iwai, Y. Fan, A. Kumar, H. Yang, L. Sledjeski, J. Hamilton, S. Chandramouli, A. Aude, and S. Palermo. IEEE J. Solid State Circuits, 54 (3): 672-684 (2019)A Novel Method to Control Leakage and Noise in Domino Circuit for Wide Fan-In OR Logic.A. Kumar, and R. Nagaria. J. Circuits Syst. Comput., 31 (3): 2250055:1-2250055:29 (2022)Fast Conformer With Linearly Scalable Attention For Efficient Speech Recognition.D. Rekesh, N. Koluguri, S. Kriman, S. Majumdar, V. Noroozi, H. Huang, O. Hrinchuk, K. Puvvada, A. Kumar, J. Balam and 1 other author(s). ASRU, page 1-8. IEEE, (2023)SEE Sensitivity of a 16GHz LC-Tank VCO in a 22nm FinFET Technology.D. Dolt, Q. Livingston, T. Liu, A. Kumar, and S. Palermo. ISCAS, page 254-257. IEEE, (2022)A Sub-500fJ/bit 3D Direct Bond Silicon Photonic Transceiver in 12nm FinFET.P. Chang, A. Samanta, P. Yan, M. Fu, Y. Zhang, M. On, A. Kumar, H. Kang, I. Yi, D. Annabattuni and 6 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)Deploying Kepler Workflows as Services on a Cloud Infrastructure for Smart Manufacturing.P. Korambath, J. Wang, A. Kumar, L. Hochstein, B. Schott, R. Graybill, M. Baldea, and J. Davis. ICCS, volume 29 of Procedia Computer Science, page 2254-2259. Elsevier, (2014)A 56 Gb/s PAM4 receiver with low-overhead threshold and edge-based DFE FIR and IIR-tap adaptation in 65nm CMOS.A. Roshan-Zamir, T. Iwai, Y. Fan, A. Kumar, H. Yang, L. Sledjeski, J. Hamilton, S. Chandramouli, A. Aude, and S. Palermo. CICC, page 1-4. IEEE, (2018)A Direct Bond Interconnect 3D Co-Integrated Silicon-Photonic Transceiver in 12nm FinFET with -20.3dBm OMA Sensitivity and 691fJ/bit.A. Samanta, P. Chang, P. Yan, M. Fu, M. On, A. Kumar, H. Kang, I. Yi, D. Annabattuni, Y. Zhang and 6 other author(s). OFC, page 1-3. IEEE, (2023)Prioritization of DevOps Maturity models using Fuzzy TOPSIS.A. Kumar, M. Nadeem, and M. Shameem. EASE, page 438-443. ACM, (2023)AI and Conventional Methods for UCT Projection Data Estimation.A. Kumar, P. Khare, and M. Goswami. J. Signal Process. Syst., 94 (4): 425-433 (2022)

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A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS.

Please choose a person to relate this publication to

Ankur Ajmera

Ankur Patel

Ankur Agarwal

Ankur Kamthe

Ankur Sinha

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Kumar, Ankur"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS.

Please choose a person to relate this publication to

Ankur Ajmera

Ankur Patel

Ankur Agarwal

Ankur Kamthe

Ankur Sinha

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
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Chicago
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A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS.