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Disambiguation of "Nandy, S. K."

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Accelerating Numerical Linear Algebra Kernels on a Scalable Run Time Reconfigurable Platform.

, , , , , , and . ISVLSI, page 161-166. IEEE Computer Society, (2010)

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Constanze Nandy

Chong-hy S k

Han-gil S k

i-s k Pak

Sagnik Nandy

 

Other publications of authors with the same name

Instruction Reuse in SPEC, media and packet processing benchmarks: A comparative study of power, performance and related microarchitectural optimizations., , and . J. Embed. Comput., 2 (1): 15-34 (2006)Parallel Factorization of Boolean Polynomials., , , , , and . Ershov Informatics Conference, volume 11964 of Lecture Notes in Computer Science, page 80-94. Springer, (2019)A Systematic Approach for Acceleration of Matrix-Vector Operations in CGRA through Algorithm-Architecture Co-Design., , , , , , and . VLSID, page 64-69. IEEE, (2019)Applying Modified Householder Transform to Kalman Filter., , , , , , and . VLSID, page 431-436. IEEE, (2019)Hardware Solution for Real-Time Face Recognition., , , , , and . VLSID, page 81-86. IEEE Computer Society, (2015)Efficient Realization of Table Look-Up Based Double Precision Floating Point Arithmetic., , , and . VLSID, page 415-420. IEEE Computer Society, (2016)Power-performance trade-off using pipeline delays., , and . ASP-DAC, page 384-386. IEEE Computer Society, (2004)On the Benefits of Speculative Trace Scheduling in VLIW Processors., , , and . PDPTA, page 822-828. CSREA Press, (2002)Enhancements for variable N-point streaming FFT/IFFT on REDEFINE, a runtime reconfigurable architecture., , , , , , and . ICSAMOS, page 178-184. IEEE, (2010)A Methodology for Architecture Synthesis of Cascaded IIR Filters on TLU FPGAs., , and . VLSI Design, page 225-228. IEEE Computer Society, (1994)