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NVLeak: Off-Chip Side-Channel Attacks via Non-Volatile Memory Systems.

, , , , , and . USENIX Security Symposium, page 6771-6788. USENIX Association, (2023)

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Symbiotic jobscheduling for a simultaneous multithreaded processor, and . SIGARCH Comput. Archit. News, 28 (5): 234--244 (November 2000)Exploring the Potential of Architecture-Level Power Optimizations., and . PACS, volume 3164 of Lecture Notes in Computer Science, page 132-147. Springer, (2003)Context-Sensitive Decoding: On-Demand Microcode Customization for Security and Energy Management., , and . IEEE Micro, 39 (3): 75-83 (2019)A Self-Repairing Prefetcher in an Event-Driven Dynamic Optimization Framework., , and . CGO, page 50-64. IEEE Computer Society, (2006)Instruction Recycling on a Multiple-Path Processor., , and . HPCA, page 44-53. IEEE Computer Society, (1999)Multithreaded Value Prediction., and . HPCA, page 5-15. IEEE Computer Society, (2005)An Event-Driven Multithreaded Dynamic Optimization Framework., , and . IEEE PACT, page 87-98. IEEE Computer Society, (2005)Context-Sensitive Fencing: Securing Speculative Execution via Microcode Customization., , and . ASPLOS, page 395-410. ACM, (2019)Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance., , , , and . ISCA, page 64-75. IEEE Computer Society, (2004)Packet Chasing: Spying on Network Packets over a Cache Side-Channel., , and . ISCA, page 721-734. IEEE, (2020)