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A 0.76V Vin Triode Region 4A Analog LDO with Distributed Gain Enhancement and Dynamic Load-Current Tracking in Intel 4 CMOS Featuring Active Feedforward Ripple Shaping and On-Chip Power Noise Analyzer.

X. Liu, H. Krishnamurthy, R. Liu, K. Ravichandran, Z. Ahmed, N. Desai, N. Butzen, J. Tschanz, and V. De. ISSCC, page 478-480. IEEE, (2022)

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Mahalakshmi Krishnamurthy

Adarsh Krishnamurthy

Arvind Krishnamurthy

Harish Balasubramaniam

Harish Kommera

Other publications of authors with the same name

A 1S Direct-Battery-Attach Integrated Buck Voltage Regulator with 5-Stack Thin-Gate 22nm FinFET CMOS Featuring Active Voltage Balancing and Cascaded Self-Turn-ON Drivers.S. Kim, H. Krishnamurthy, S. Amin, S. Weng, J. Feng, H. Do, K. Radhakrishnan, K. Ravichandran, J. Tschanz, and V. De. VLSI Circuits, page 1-2. IEEE, (2021)A Single-Stage, Single-Inductor, 6-Input 9-Output Multi-Modal Energy Harvesting Power Management IC for 100µW-120MW Battery-Powered IoT Edge Nodes.S. Kim, V. Vaidya, C. Schaef, A. Lines, H. Krishnamurthy, S. Weng, X. Liu, D. Kurian, T. Karnik, K. Ravichandran and 2 other author(s). VLSI Circuits, page 195-196. IEEE, (2018)A 500 MHz, 68% efficient, fully on-die digitally controlled buck Voltage Regulator on 22nm Tri-Gate CMOS.H. Krishnamurthy, V. Vaidya, P. Kumar, G. Matthew, S. Weng, B. Thiruvengadam, W. Proefrock, K. Ravichandran, and V. De. VLSIC, page 1-2. IEEE, (2014)A 0.4V∼1V 0.2A/mm2 70% efficient 500MHz fully integrated digitally controlled 3-level buck voltage regulator with on-die high density MIM capacitor in 22nm tri-gate CMOS.P. Kumar, V. Vaidya, H. Krishnamurthy, S. Kim, G. Matthew, S. Weng, B. Thiruvengadam, W. Proefrock, K. Ravichandran, and V. De. CICC, page 1-4. IEEE, (2015)A SCA-Resistant AES Engine in 14nm CMOS with Time/Frequency-Domain Leakage Suppression using Non-Linear Digital LDO Cascaded with Arithmetic Countermeasures.R. Kumar, X. Liu, V. Suresh, H. Krishnamurthy, M. Anders, H. Kaul, K. Ravichandran, V. De, and S. Mathew. VLSI Circuits, page 1-2. IEEE, (2020)A Monolithic 26A/mm2Imax, 88.5% Peak-Efficiency Continuously Scalable Conversion-Ratio Switched-Capacitor DC-DC Converter.N. Butzen, H. Krishnamurthy, Z. Ahmed, S. Weng, K. Ravichandran, M. Zelikson, J. Tschanz, and J. Douglas. ISSCC, page 232-233. IEEE, (2023)27.3 EM and Power SCA-Resilient AES-256 in 65nm CMOS Through >350× Current-Domain Signature Attenuation.D. Das, J. Danial, A. Golder, N. Modak, S. Maity, B. Chatterjee, D. Seo, M. Chang, A. Varna, H. Krishnamurthy and 4 other author(s). ISSCC, page 424-426. IEEE, (2020)A 0.76V Vin Triode Region 4A Analog LDO with Distributed Gain Enhancement and Dynamic Load-Current Tracking in Intel 4 CMOS Featuring Active Feedforward Ripple Shaping and On-Chip Power Noise Analyzer.X. Liu, H. Krishnamurthy, R. Liu, K. Ravichandran, Z. Ahmed, N. Desai, N. Butzen, J. Tschanz, and V. De. ISSCC, page 478-480. IEEE, (2022)A Fully Integrated Voltage Regulator in 14nm CMOS with Package-Embedded Air-Core Inductor Featuring Self-Trimmed, Digitally Controlled Variable On-Time Discontinuous Conduction Mode Operation.C. Schaef, N. Desai, H. Krishnamurthy, S. Weng, H. Do, W. Lambert, K. Radhakrishnan, K. Ravichandran, J. Tschanz, and V. De. ISSCC, page 154-156. IEEE, (2019)Synthesizable delay line architectures for digitally controlled voltage regulators.O. Haridy, H. Krishnamurthy, A. Helmy, and Y. Ismail. SoCC, page 72-77. IEEE, (2012)

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