Author of the publication

A 1-3.2 GHz 0.6 mW/GHz Duty-Cycle-Corrector Using Bangbang Duty-Cyle-Detector.

, , , , and . ISCAS, page 1-4. IEEE, (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A 15 Gb/s Non-Return-to-Zero Transmitter With 1-Tap Pre-Emphasis Feed-Forward Equalizer for Low-Power Ground Terminated Memory Interfaces., , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (6): 2737-2741 (2022)A 4-GHz Ring-Oscillator-Based Digital Sub-Sampling PLL With Energy-Efficient Dual-Domain Phase Detector., , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (7): 2734-2743 (July 2023)A 0.385-pJ/bit 10-Gb/s TIA-Terminated Di-Code Transceiver with Edge-Delayed Equalization, ECC, and Mismatch Calibration for HBM Interfaces., , , , , , and . ISSCC, page 1-3. IEEE, (2022)A 1.3-4-GHz Quadrature-Phase Digital DLL Using Sequential Delay Control and Reconfigurable Delay Line., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 56 (6): 1886-1896 (2021)A Single-Ended NRZ Receiver With Gain-Enhanced Active-Inductive CTLE and Reference-Selection DFE for Memory Interfaces., , , , , , , and . IEEE J. Solid State Circuits, 59 (4): 1261-1270 (April 2024)PAM-4 Receiver With 1-Tap DFE Using Clocked Comparator Offset Instead of Threshold Voltages for Improved LSB BER Performance., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (5): 1907-1916 (May 2023)A 1-3.2 GHz 0.6 mW/GHz Duty-Cycle-Corrector Using Bangbang Duty-Cyle-Detector., , , , and . ISCAS, page 1-4. IEEE, (2021)A 16-Gb/s NRZ Receiver With 0.0019-pJ/bit/dB 1-Tap Charge-Redistribution DFE., , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (3): 904-908 (March 2023)A 0.83pJ/b 52Gb/s PAM-4 Baud-Rate CDR with Pattern-Based Phase Detector for Short-Reach Applications., , , , , , and . ISSCC, page 118-119. IEEE, (2023)A 13-Gb/s Single-Ended NRZ Receiver With 1-Sample Per 2-UI Using Data Edge Sampling for Memory Interfaces., , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 71 (7): 3328-3332 (July 2024)