( en | de | ru )

 

Disambiguation of "Kim, Lee-Sup"

Author of the publication

copydeleteadd this publication to your clipboard
A 21-Gbit/s 1.63-pJ/bit Adaptive CTLE and One-Tap DFE With Single Loop Spectrum Balancing Method.

, , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (2): 789-793 (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Sang Sup Kim

Kwang-Sup Lee

Sang-Sup Lee

Yong-Sup Kim

Lee Jun Kim

 

Other publications of authors with the same name

A 20 Gbps 1-tap decision feedback equalizer with unfixed tap coefficient., and . ISCAS, page 321-324. IEEE, (2012)A high performance low power dynamic PLA with conditional evaluation scheme., and . ISCAS (2), page 881-884. IEEE, (2004)A low power charge sharing ROM using dummy bit lines., and . ISCAS (5), page 377-380. IEEE, (2003)A low-power ROM using single charge-sharing capacitor and hierarchical bit line., and . IEEE Trans. Very Large Scale Integr. Syst., 14 (4): 313-322 (2006)An 11.5 Gb/s 1/4th Baud-Rate CTLE and Two-Tap DFE With Boosted High Frequency Gain in 110-nm CMOS., , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (3): 588-592 (2015)A 0.9-V 12-Gb/s Two-FIR Tap Direct DFE With Feedback-Signal Common-Mode Control., , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (3): 724-728 (2019)A Reconfigurable SIMT Processor for Mobile Ray Tracing With Contention Reduction in Shared Memory., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 60-I (4): 938-950 (2013)A DLL With Jitter Reduction Techniques and Quadrature Phase Generation for DRAM Interfaces., , , , and . IEEE J. Solid State Circuits, 44 (5): 1522-1530 (2009)A 100 MHz-to-1 GHz Fast-Lock Synchronous Clock Generator With DCC for Mobile Applications., and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (8): 477-481 (2011)A LOG-Induced SSN-Tolerant Transceiver for On-Chip Interconnects in COG-Packaged Source Driver IC for TFT-LCD., , and . IEEE Trans. Circuits Syst. II Express Briefs, 60-II (1): 21-25 (2013)