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Disambiguation of "Kim, Yong-Hun"

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A 21-Gbit/s 1.63-pJ/bit Adaptive CTLE and One-Tap DFE With Single Loop Spectrum Balancing Method.

, , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (2): 789-793 (2016)

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Hun Kim

Hun Kim

Yong-Hun Jo

Yong-Hun Jo

Yong-Hun Jo

 

Other publications of authors with the same name

A 5-Gb/s Digital Clock and Data Recovery Circuit With Reduced DCO Supply Noise Sensitivity Utilizing Coupling Network., , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (1): 380-384 (2017)A 10.8 Gb/s Quarter-Rate 1 FIR 1 IIR Direct DFE With Non-Time-Overlapping Data Generation for 4: 1 CMOS Clockless Multiplexer., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (1): 67-71 (2020)Gyroscope Bias Estimation Method using Iterated State Transition Fusion Algorithm., , , , , and . ASCC, page 2237-2240. IEEE, (2022)A 16Gb 9.5Gb/S/pin LPDDR5X SDRAM With Low-Power Schemes Exploiting Dynamic Voltage-Frequency Scaling and Offset-Calibrated Readout Sense Amplifiers in a Fourth Generation 10nm DRAM Process., , , , , , , , , and 37 other author(s). ISSCC, page 448-450. IEEE, (2022)A 0.87 V 12.5 Gb/s Clock-Path Feedback Equalization Receiver with Unfixed Tap Weighting Property in 65 nm CMOS., , , and . VLSI Circuits, page 196-. IEEE, (2019)A Digital Audio Watermarking Using Two Masking Effects., , , and . IEEE Pacific Rim Conference on Multimedia, volume 2532 of Lecture Notes in Computer Science, page 655-662. Springer, (2002)A 5-Gb/s 2.67-mW/Gb/s Digital Clock and Data Recovery With Hybrid Dithering Using a Time-Dithered Delta-Sigma Modulator., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (4): 1450-1459 (2016)A 0.65-V, 11.2-Gb/s Power Noise Tolerant Source-Synchronous Injection-Locked Receiver With Direct DTLB DFE., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (11): 1564-1568 (2018)25.2 A 16Gb Sub-1V 7.14Gb/s/pin LPDDR5 SDRAM Applying a Mosaic Architecture with a Short-Feedback 1-Tap DFE, an FSS Bus with Low-Level Swing and an Adaptively Controlled Body Biasing in a 3rd-Generation 10nm DRAM., , , , , , , , , and 24 other author(s). ISSCC, page 346-348. IEEE, (2021)DeRO: Dead Reckoning Based on Radar Odometry With Accelerometers Aided for Robot Localization., , , , and . CoRR, (2024)