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Coordinated transformations for high-level synthesis of high performance microprocessor blocks.

, , , , , , , and . DAC, page 898-903. ACM, (2002)

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ASIC Design., and . The VLSI Handbook, CRC Press, (1999)Opportunities and pitfalls in HDL-based system design., , , and . ICCD, page 56-57. IEEE Computer Society, (1996)Compiler-Directed Cache Line Size Adaptivity., , , , and . Intelligent Memory Systems, volume 2107 of Lecture Notes in Computer Science, page 183-187. Springer, (2000)Compiler-Directed Cache Assist Adaptivity., , , , and . ISHPC, volume 1940 of Lecture Notes in Computer Science, page 88-104. Springer, (2000)Ads(3)/CFT(2) to Ads(2)/CFT(1), and . (Jan 28, 2009)Constrained software synthesis for embedded applications., and . J. Syst. Archit., 43 (8): 557-586 (1997)Marble: collaborative scheduling of batteryless sensors with meta reinforcement learning., , , , and . BuildSys@SenSys, page 140-149. ACM, (2021)BEAR-Data: Analysis and Applications of an Open Multizone Building Dataset., , , , , and . BuildSys@SenSys, page 240-243. ACM, (2023)Timing-driven HW/SW codesign based on task structuring and process timing simulation., , and . CODES, page 203-207. ACM, (1999)Specification and analysis of timing constraints for embedded systems., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (3): 240-256 (1997)