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Near-Memory and In-Storage FPGA Acceleration for Emerging Cognitive Computing Workloads.

, , , , , , , , and . ISVLSI, page 68-75. IEEE, (2019)

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Maximizing throughput of power/thermal-constrained processors by balancing power consumption of cores., , and . ISQED, page 633-638. IEEE, (2014)An Energy-Efficient Programmable Mixed-Signal Accelerator for Machine Learning Algorithms., , , , and . IEEE Micro, 39 (5): 64-72 (2019)QoS-aware dynamic resource allocation for spatial-multitasking GPUs., , and . ASP-DAC, page 726-731. IEEE, (2014)Runtime temperature-based power estimation for optimizing throughput of thermal-constrained multi-core processors., , , , and . ASP-DAC, page 593-599. IEEE, (2010)Energy-efficient floating-point arithmetic for digital signal processors., , and . ACSCC, page 1823-1827. IEEE, (2011)Low-Cost Per-Core Voltage Domain Support for Power-Constrained High-Performance Processors., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (4): 747-758 (2014)Optimizing throughput of power- and thermal-constrained multicore processors using DVFS and per-core power-gating., and . DAC, page 47-50. ACM, (2009)Exploiting GPU peak-power and performance tradeoffs through reduced effective pipeline latency., , and . MICRO, page 74-85. ACM, (2013)Drowsy instruction caches: leakage power reduction using dynamic voltage scaling and cache sub-bank prediction., , , and . MICRO, page 219-230. ACM/IEEE Computer Society, (2002)QEI: Query Acceleration Can be Generic and Efficient in the Cloud., , , , , and . HPCA, page 385-398. IEEE, (2021)