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Другие публикации лиц с тем же именем

Toward a Formal and Quantitative Evaluation Framework for Circuit Obfuscation Methods., , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (10): 1844-1857 (2019)Parallelizing SAT-based de-camouflaging attacks by circuit partitioning and conflict avoiding., , , и . Integr., (2019)SVM-Based Routability-Driven Chip-Level Design for Voltage-Aware Pin-Constrained EWOD Chips., , , , и . ISPD, стр. 49-56. ACM, (2015)A thermal-driven force-directed floorplanning algorithm for 3D ICs., , , и . CAD/Graphics, стр. 497-502. IEEE, (2009)A novel fine-grain track routing approach for routability and crosstalk optimization., , , , , и . ISQED, стр. 621-626. IEEE, (2011)A new splitting graph construction algorithm for SIAR router., , , и . ASICON, стр. 1-4. IEEE, (2013)Evaluating a bounded slice-line grid assignment in O(nlogn) time., , , , , , и . ISCAS (4), стр. 708-711. IEEE, (2003)SIAR: splitting-graph-based interactive analog router., , , и . ACM Great Lakes Symposium on VLSI, стр. 367-370. ACM, (2011)UTACO: a unified timing and congestion optimizing algorithm for standard cell global routing., , , , , , и . ASP-DAC, стр. 834-839. ACM, (2003)Static Probability Analysis Guided RTL Hardware Trojan Test Generation., , и . ASP-DAC, стр. 510-515. ACM, (2023)