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A 0.0129 mm2 DPLL With 1.6~2.0 ps RMS Period Jitter and 0.25-to-2.7 GHz Tunable DCO Frequency Range in 55-nm CMOS.

, , , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (12): 1844-1848 (2018)

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Puangrat Yongvanit

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