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Effective cache bank placement for GPUs., , , , и . DATE, стр. 31-36. IEEE, (2017)Chapter Three - A power-performance balanced network-on-chip for mixed CPU-GPU systems., , , и . Adv. Comput., (2022)Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction., , , , , , и . MICRO, стр. 1-18. IEEE, (2022)LTRF: Enabling High-Capacity Register Files for GPUs via Hardware/Software Cooperative Register Prefetching., , , , , , , и . ASPLOS, стр. 489-502. ACM, (2018)An energy-efficient virtual channel power-gating mechanism for on-chip networks., , , , и . DATE, стр. 1527-1532. ACM, (2015)FIGARO: Improving System Performance via Fine-Grained In-DRAM Data Relocation and Caching., , , , , , , , , и 1 other автор(ы). MICRO, стр. 313-328. IEEE, (2020)Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis., , , , , , , , , и . HPCA, стр. 280-296. IEEE, (2024)Energy Consumption Analysis of Instruction Cache Prefetching Methods., , , и . SBAC-PADW, стр. 60-67. IEEE, (2023)Venice: Improving Solid-State Drive Parallelism at Low Cost via Conflict-Free Accesses., , , , , , , , и . ISCA, стр. 36:1-36:16. ACM, (2023)Quantifying the difference in resource demand among classic and modern NoC workloads., , , и . ICCD, стр. 404-407. IEEE Computer Society, (2016)