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FeatherNet: An Accelerated Convolutional Neural Network Design for Resource-constrained FPGAs.

R. Morcel, H. Hajj, M. Saghir, H. Akkary, H. Artail, R. Khanna, and A. Keshavamurthy. ACM Trans. Reconfigurable Technol. Syst., 12 (2): 6:1-6:27 (2019)

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RESTful Hardware Microservices Using Reconfigurable Networked Accelerators in Cloud and Edge Datacenters.M. Ezzeddine, R. Morcel, H. Artail, M. Saghir, H. Akkary, and H. Hajj. CloudNet, page 1-4. IEEE, (2018)FPGA-Accelerated Hadoop Cluster for Deep Learning Computations.A. Alhamali, N. Salha, R. Morcel, M. Ezzeddine, O. Hamdan, H. Akkary, and H. Hajj. ICDM Workshops, page 565-574. IEEE Computer Society, (2015)FPGA-Based Accelerator for Deep Convolutional Neural Networks for the SPARK Environment.R. Morcel, M. Ezzeddine, and H. Akkary. SmartCloud, page 126-133. IEEE Computer Society, (2016)Middleware Support for Seamless Integration of Domain Specific Cores in Cloud Datacenters.M. Ezzeddine, R. Morcel, and H. Akkary. SmartCloud, page 118-125. IEEE Computer Society, (2016)Optimized Distribution of an Accelerated Convolutional Neural Network across Multiple FPGAs.A. Maarouf, N. Droubi, R. Morcel, H. Hajj, M. Saghir, and H. Akkary. FCCM, page 235. IEEE, (2020)FeatherNet: An Accelerated Convolutional Neural Network Design for Resource-constrained FPGAs.R. Morcel, H. Hajj, M. Saghir, H. Akkary, H. Artail, R. Khanna, and A. Keshavamurthy. ACM Trans. Reconfigurable Technol. Syst., 12 (2): 6:1-6:27 (2019)Minimalist Design for Accelerating Convolutional Neural Networks for Low-End FPGA Platforms.R. Morcel, H. Akkary, H. Hajj, M. Saghir, A. Keshavamurthy, R. Khanna, and H. Artail. FCCM, page 196. IEEE Computer Society, (2017)Speedy Cloud: Cloud Computing with Support for Hardware Acceleration Services.H. Artail, M. Saghir, M. Sharafeddine, H. Hajj, A. Kaitoua, R. Morcel, and H. Akkary. IEEE Trans. Cloud Computing, 7 (3): 850-865 (2019)Proactive channel allocation for multimedia applications over CSMA/CA-based CRNs.R. Morcel, H. Sarieddeen, I. Elhajj, A. Kayssi, and A. Chehab. ACTEA, page 178-183. IEEE, (2016)

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Disambiguation of "Morcel, Raghid"

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FeatherNet: An Accelerated Convolutional Neural Network Design for Resource-constrained FPGAs.

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Disambiguation of "Morcel, Raghid"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML FeatherNet: An Accelerated Convolutional Neural Network Design for Resource-constrained FPGAs.

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FeatherNet: An Accelerated Convolutional Neural Network Design for Resource-constrained FPGAs.