( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Verification of Quantitative Hyperproperties Using Trace Enumeration Relations.

, , и . CAV (1), том 12224 из Lecture Notes in Computer Science, стр. 201-224. Springer, (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Pramod Chandrashekhariah

Pramod Shah

Pramod Shah

Pramod Sagar

Pramod Talgeri

 

Другие публикации лиц с тем же именем

Energy-efficient redundant execution for chip multiprocessors., , , и . ACM Great Lakes Symposium on VLSI, стр. 143-146. ACM, (2010)A Formal Approach to Secure Speculation., , , и . CSF, стр. 288-303. IEEE, (2019)Verification of Authenticated Firmware Loaders., , и . FMCAD, стр. 110-119. IEEE, (2019)Lazy Self-composition for Security Verification., , , , и . CAV (2), том 10982 из Lecture Notes in Computer Science, стр. 136-156. Springer, (2018)Adaptive execution assistance for multiplexed fault-tolerant chip multiprocessors., , , и . ICCD, стр. 419-426. IEEE Computer Society, (2011)Verifying information flow properties of firmware using symbolic execution., , , , и . DATE, стр. 337-342. IEEE, (2016)Functional Analysis Attacks on Logic Locking., и . CoRR, (2018)Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification., , , , , и . CoRR, (2018)Template-Based Parameterized Synthesis of Uniform Instruction-Level Abstractions for SoC Verification., , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (8): 1692-1705 (2018)Functional Analysis Attacks on Logic Locking., и . DATE, стр. 936-939. IEEE, (2019)