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Enabling Resistive-RAM-based Activation Functions for Deep Neural Network Acceleration.

, , , , , , , and . ACM Great Lakes Symposium on VLSI, page 345-350. ACM, (2020)

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Efficient temporal task partition for coarse-grain reconfigurable systems based on Simulated Annealing Genetic Algorithm., , , , and . ASICON, page 941-944. IEEE, (2011)Reducing Memory Access Conflicts with Loop Transformation and Data Reuse on Coarse-grained Reconfigurable Architecture., , , , , and . DATE, page 124-129. IEEE, (2021)An Automated Fault Injection Technique Based on VHDL Syntax Analysis and Stratified Sampling., , and . DELTA, page 587-591. IEEE Computer Society, (2008)A Flexible and High-Precision Activation Function Unit Based on Equi-Error Partitioning Algorithm., , , , , , and . ISCAS, page 1-5. IEEE, (2024)Lung Nodule Detection in CT Images Using a Raw Patch-Based Convolutional Neural Network., , , , and . J. Digital Imaging, 32 (6): 971-979 (2019)Enabling Resistive-RAM-based Activation Functions for Deep Neural Network Acceleration., , , , , , , and . ACM Great Lakes Symposium on VLSI, page 345-350. ACM, (2020)Towards Higher Performance and Robust Compilation for CGRA Modulo Scheduling., , , , , , and . IEEE Trans. Parallel Distributed Syst., 31 (9): 2201-2219 (2020)A Mapping Method for Reconfigurable Array based on Decoupled DataFlow., , , , , and . BigDataSecurity, page 180-185. IEEE, (2021)A contactless testing methodology for pre-bond interposer., , , and . MWSCAS, page 1-4. IEEE, (2015)Parasitic Parameters Impacts Investigation on Soft Error Rate by a Circuit Level Framework., , and . PRDC, page 325-326. IEEE Computer Society, (2015)