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Disambiguation of "Ju, Roy"

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Inter-procedural stacked register allocation for itanium® like architecture.

, , , , , and . ICS, page 215-225. ACM, (2003)

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Roy Hornig

Beschreibung mikro-rheologischer Vorgänge und resultierender Verbundstrukturen beim Elastomermischprozeß im Innenmischer durch rheologische Untersuchungen. NA Halle-Wittenberg, (2009)

Kai Ju

Zhaojie Ju

Ziyang Ju

Suyang Ju

 

Other publications of authors with the same name

XTREM: a power simulator for the Intel XScale® core., , , , and . LCTES, page 115-125. ACM, (2004)Multi-core scalability-impacting compiler optimizations., , , and . Comput. Sci. Res. Dev., 25 (1-2): 15-24 (2010)An Overview of the Open Research Compiler., , , , , , , and . LCPC, volume 3602 of Lecture Notes in Computer Science, page 17-31. Springer, (2004)Shangri-La: achieving high performance from compiled network applications while enabling ease of programming., , , , , , and . PLDI, page 224-236. ACM, (2005)Performance potentials of compiler-directed data speculation., , , and . ISPASS, page 22-31. IEEE Computer Society, (2003)Optimizing Packet Accesses for a Domain Specific Language on Network Processors., , , , and . LCPC, volume 4339 of Lecture Notes in Computer Science, page 47-61. Springer, (2005)POV-Ray Parallelization and Optimization: An Experience Report., , , , and . PDPTA, page 997-1003. CSREA Press, (2005)Inter-procedural stacked register allocation for itanium® like architecture., , , , , and . ICS, page 215-225. ACM, (2003)Applying Data Speculation in Modulo Scheduled Loops., , , and . IEEE PACT, page 169-178. IEEE Computer Society, (2000)Algorithm and Hardware Support for Branch Anticipation., , , and . Great Lakes Symposium on VLSI, page 163-. IEEE Computer Society, (1997)