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Inter-procedural stacked register allocation for itanium® like architecture.

, , , , , and . ICS, page 215-225. ACM, (2003)

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Performance of Interconnection Network in Multithreaded Architectures., , , and . PARLE, volume 817 of Lecture Notes in Computer Science, page 823-826. Springer, (1994)Data locality sensitivity of multithreaded computations on a distributed-memory multiprocessor., , , and . CASCON, page 37. IBM, (1996)Guest Editorial: Special issue on Network and Parallel Computing for Emerging Architectures and Applications., and . Int. J. Parallel Program., 49 (5): 625-627 (2021)A novel framework for multi-rate scheduling in DSP applications., and . ASAP, page 77-88. IEEE, (1993)Concurrency Analysis for Shared Memory Programs with Textually Unaligned Barriers., , and . LCPC, volume 5234 of Lecture Notes in Computer Science, page 95-109. Springer, (2007)Polytasks: A Compressed Task Representation for HPC Runtimes., , , , and . LCPC, volume 7146 of Lecture Notes in Computer Science, page 268-282. Springer, (2011)Locality Optimization of Stencil Applications Using Data Dependency Graphs., , and . LCPC, volume 6548 of Lecture Notes in Computer Science, page 77-91. Springer, (2010)Well-behaved dataflow programs for DSP computation., , and . ICASSP, page 561-564. IEEE Computer Society, (1992)Discriminating transmembrane proteins from signal peptides using SVM-Fisher approach., , and . ICMLA, IEEE Computer Society, (2005)Landing Containment Domains on SWARM: Toward a Robust Resiliency Solution on a Dynamic Adaptive Runtime Machine., , , and . PARCO, volume 27 of Advances in Parallel Computing, page 753-761. IOS Press, (2015)