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Power Efficient Instruction Caches for Embedded Systems.

, , and . SAMOS, volume 3553 of Lecture Notes in Computer Science, page 182-191. Springer, (2005)

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Power Efficient Instruction Caches for Embedded Systems., , and . SAMOS, volume 3553 of Lecture Notes in Computer Science, page 182-191. Springer, (2005)Exploiting Locality in Hybrid Dataflow Programs., , and . Multithreaded Computer Architecture, volume 281 of The Kluwer International Series in Engineering and Computer Science, Kluwer / Springer, (1994)Resource Management in Dataflow-Based Multithreaded Execution., , , and . J. Parallel Distributed Comput., 61 (5): 581-608 (2001)High-Level Language Abstraction for Reconfigurable Computing., , , , , , , and . Computer, 36 (8): 63-69 (2003)Efficient near-duplicate document detection using FPGAs., , and . IEEE BigData, page 54-61. IEEE Computer Society, (2013)FPGA-based Multithreading for In-Memory Hash Joins., , , and . CIDR, www.cidrdb.org, (2015)A one-shot configurable-cache tuner for improved energy and performance., , , , and . DATE, page 755-760. EDA Consortium, San Jose, CA, USA, (2007)One-Step Compilation of Image Processing Applications to FPGAs., , , , , , and . FCCM, page 209-218. IEEE Computer Society, (2001)Analysis of Buffer Design for Adaptive Routing in Direct Networks., and . MASCOTS, page 134-139. IEEE Computer Society, (1996)An Evaluation of Optimized Threaded Code Generation., , , and . IFIP PACT, volume A-50 of IFIP Transactions, page 37-46. North-Holland, (1994)