( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Exploiting Locality in Hybrid Dataflow Programs.

, , и . Multithreaded Computer Architecture, том 281 из The Kluwer International Series in Engineering and Computer Science, Kluwer / Springer, (1994)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Maher Najjar

An old story with new twists: lactate dehydrogenase 5 (LDH-V) in tumor development: investigation of the relationship between LDH-V and hypoxia, tumor characteristics by functional analysis of LDH-deficient tumor cells in vitro and in experimental tumor models. HU Berlin, (2009)

Hani Najjar

Rajaa Najjar

Daniah Najjar

Said Najjar

 

Другие публикации лиц с тем же именем

Automatic Compilation Framework for Bloom Filter Based Intrusion Detection., , , и . ARC, том 3985 из Lecture Notes in Computer Science, стр. 413-418. Springer, (2006)Exploring irregular memory accesses on FPGAs., , и . IA3@SC, стр. 31-34. ACM, (2011)FPGA code accelerators - the compiler perspective., и . DAC, стр. 141:1-141:6. ACM, (2013)Exploiting Locality in Hybrid Dataflow Programs., , и . Multithreaded Computer Architecture, том 281 из The Kluwer International Series in Engineering and Computer Science, Kluwer / Springer, (1994)Power Efficient Instruction Caches for Embedded Systems., , и . SAMOS, том 3553 из Lecture Notes in Computer Science, стр. 182-191. Springer, (2005)Compiler generated systolic arrays for wavefront algorithm acceleration on FPGAs., и . FPL, стр. 655-658. IEEE, (2008)Resource Management in Dataflow-Based Multithreaded Execution., , , и . J. Parallel Distributed Comput., 61 (5): 581-608 (2001)An Evaluation of Optimized Threaded Code Generation., , , и . IFIP PACT, том A-50 из IFIP Transactions, стр. 37-46. North-Holland, (1994)Compiled multithreaded data paths on FPGAs for dynamic workloads., и . CASES, стр. 3:1-3:10. IEEE, (2013)Techniques for synthesizing binaries to an advanced register/memory structure., , , и . FPGA, стр. 118-124. ACM, (2005)