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Disambiguation of "Gu, Chongyan"

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Novel lightweight FF-APUF design for FPGA.

, , , and . SoCC, page 75-80. IEEE, (2016)

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Xuewu Gu

Xiaogang Gu

Wei Gu

Hyosong Gu

Jie Gu

 

Other publications of authors with the same name

Ultra-compact and robust FPGA-based PUF identification generator., and . ISCAS, page 934-937. IEEE, (2015)A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation., , , , , and . IEEE Trans. Emerg. Top. Comput., 9 (4): 1853-1866 (2021)Dynamically Configurable Physical Unclonable Function based on RRAM Crossbar., , , , and . NANOARCH, page 1-6. IEEE, (2021)A Novel Method Against Hardware Trojans in Approximate Circuits., , , and . ISQED, page 1-6. IEEE, (2023)A Highly Flexible Lightweight and High Speed True Random Number Generator on FPGA., , , , , and . ISVLSI, page 399-404. IEEE Computer Society, (2018)Modelling Attack Analysis of Configurable Ring Oscillator (CRO) PUF Designs., , , , , and . DSP, page 1-5. IEEE, (2018)FPGA-based strong PUF with increased uniqueness and entropy properties., , and . ISCAS, page 1-4. IEEE, (2017)A Lightweight and Machine-Learning-Resistant PUF Using Obfuscation-Feedback-Shift-Register., , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (11): 4543-4547 (2022)An RRAM-based PUF with Adjustable Programmable Voltage and Multi-Mode Operation., , , , and . NANOARCH, page 20:1-20:5. ACM, (2023)Negative Capacitance FET 8T SRAM Computing in-Memory based Logic Design for Energy Efficient AI Edge Devices., , , , , , , and . ISCAS, page 1-5. IEEE, (2024)